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The programming circuit of look-up table based FPGAs consists of two shift registers, a control circuit and a configuration memory (SRAM) cell array. Because the configuration memory cell array can be easily tested by conventional test methods for RAMs, we focus on testing for the shift registers. We show that the testing can be done by using only the faculties of the programming circuit, without using additional hardware
field programmable gate arrays
Digital Object Identifier: 10.1109/ATS.1997.643965
Published with permission from the copyright holder. This is the institute's copy, as published in Test Symposium, 1997. (ATS '97) Proceedings., Sixth Asian, 17-19 Nov.1997, Pages 242-247.
Copyright © 1997 IEEE. All rights reserved.